Atom has a solid technical team with international culture. Our core team is from top-tier IC design companies and world-class universities. Atom focuses on developing top-notch analog, and mixed-signal chip products. Currently, we have 3 working sites in Hong Kong, Shenzhen, and Shanghai. All sites are located at the technology center of these cities. We invite excellent designers to join our venture. We have openings at different levels in various specific areas.

Digital IC design engineer (back-end)

Job information
1. Responsible for the back-end implementation of digital design, including layout, timing sign-off, power sign-off.
2. Work closely with front-end engineers to optimize timing/area/power consumption, and perform static timing analysis
3. Optimize and verify the layout of the tape-out (including parasitic parameter extraction, ECO, DRC, LVS)
4. Analysis and optimization of voltage drop, optimization of parasitic parameters and optimization of chip size
5. Static timing analysis and timing correction
6. Formal verification

Job Requirements:
1. A full-time master's degree in electronics, or an excellent undergraduate majoring in microelectronics 211/985;
2. Have a solid foundation of digital circuits;
3. Having back-end layout and successful tape out experience is preferred;
4. Experience in Synopsys or Cadence back-end implementation tools and processes is preferred;
5. Those with ARM related experience are preferred;
6. Have professionalism, teamwork spirit and good communication skills, be pragmatic, serious, and diligent.

Digital IC Design Engineer (Intern)

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Analog IC design engineer

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IC Product Manager

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If you are interested to join us, please fill in your information in the form below and we will get back to you as soon as possible.


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    Digital IC design engineer (back-end)

    Job information
    1. Responsible for the back-end implementation of digital design, including layout, timing sign-off, power sign-off.
    2. Work closely with front-end engineers to optimize timing/area/power consumption, and perform static timing analysis
    3. Optimize and verify the layout of the tape-out (including parasitic parameter extraction, ECO, DRC, LVS)
    4. Analysis and optimization of voltage drop, optimization of parasitic parameters and optimization of chip size
    5. Static timing analysis and timing correction
    6. Formal verification

    Job Requirements:
    1. A full-time master's degree in electronics, or an excellent undergraduate majoring in microelectronics 211/985;
    2. Have a solid foundation of digital circuits;
    3. Having back-end layout and successful tape out experience is preferred;
    4. Experience in Synopsys or Cadence back-end implementation tools and processes is preferred;
    5. Those with ARM related experience are preferred;
    6. Have professionalism, teamwork spirit and good communication skills, be pragmatic, serious, and diligent.

    Digital IC Design Engineer (Intern)

    Your content goes here. Edit or remove this text inline or in the module Content settings. You can also style every aspect of this content in the module Design settings and even apply custom CSS to this text in the module Advanced settings.

    Analog IC design engineer

    Your content goes here. Edit or remove this text inline or in the module Content settings. You can also style every aspect of this content in the module Design settings and even apply custom CSS to this text in the module Advanced settings.

    IC Product Manager

    Your content goes here. Edit or remove this text inline or in the module Content settings. You can also style every aspect of this content in the module Design settings and even apply custom CSS to this text in the module Advanced settings.

    If you are interested to join us, please fill in your information in the form below and we will get back to you as soon as possible.


      captcha
      Digital IC design engineer (back-end)

      Job information
      1. Responsible for the back-end implementation of digital design, including layout, timing sign-off, power sign-off.
      2. Work closely with front-end engineers to optimize timing/area/power consumption, and perform static timing analysis
      3. Optimize and verify the layout of the tape-out (including parasitic parameter extraction, ECO, DRC, LVS)
      4. Analysis and optimization of voltage drop, optimization of parasitic parameters and optimization of chip size
      5. Static timing analysis and timing correction
      6. Formal verification

      Job Requirements:
      1. A full-time master's degree in electronics, or an excellent undergraduate majoring in microelectronics 211/985;
      2. Have a solid foundation of digital circuits;
      3. Having back-end layout and successful tape out experience is preferred;
      4. Experience in Synopsys or Cadence back-end implementation tools and processes is preferred;
      5. Those with ARM related experience are preferred;
      6. Have professionalism, teamwork spirit and good communication skills, be pragmatic, serious, and diligent.

      Digital IC Design Engineer (Intern)

      Your content goes here. Edit or remove this text inline or in the module Content settings. You can also style every aspect of this content in the module Design settings and even apply custom CSS to this text in the module Advanced settings.

      Analog IC design engineer

      Your content goes here. Edit or remove this text inline or in the module Content settings. You can also style every aspect of this content in the module Design settings and even apply custom CSS to this text in the module Advanced settings.

      IC Product Manager

      Your content goes here. Edit or remove this text inline or in the module Content settings. You can also style every aspect of this content in the module Design settings and even apply custom CSS to this text in the module Advanced settings.

      If you are interested to join us, please fill in your information in the form below and we will get back to you as soon as possible.


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